Low voltage operation CMOS
Digital signals in a CMOS circuit are processed by combinations of the ON- and OFF-states of MOSFETs in LSI devices. This subtheme aims to reduce the power consumption of LSI logic by a factor of ten or more by lowering the supply voltage Vdd necessary to secure reasonable ON- and OFF-state current values for each MOSFET. For this purpose, the following two research and development programs are being carried out.
(1) The reduction of the supply voltage required for fixed ON- and OFF-state current values by use of high-mobility materials and/or non-planar structures resulting in MOSFETs with higher current drivability.
(2) The reduction of the OFF-state current for a fixed supply voltage and the fixed ON-state current by the introducing of novel operation principles into CMOS-FETs.
1.1 Research and development of high-mobility and non-planar channel CMOS technology
Higher current drivability of MOSFETs expected by replacing conventional Si channels to high-mobility materials such as Ge or III-V compound semiconductor. In addition, non-planar channel structures such as FinFET, Trigate- or gate-all-around FETs are known to reduce the short-channel effect over conventional planar FETs on a bulk Si substrate. This research group is aiming to enhance the current drivability by combining the two technologies with keeping a reasonably low OFF-state current. The combined MOSFETs are expected to exhibit sufficiently high ON-state current for lower Vdd values than for the conventional bulk planar Si-MOSFETs, resulting in the operation with lower power consumption.
1.2 Research and development of steep slope CMOS device
In CMOS-FET, the operation voltage can be decreased if steep rising of the current below the threshold voltage is made possible. That requires reviewing the previous operating principle. The steep subthreshold swing of transistor is improved by using new operating principle such as a tunnel effect, the avalanche multiplication, and so on. We are developing the basic technologies for achieving LSI of low power consumption.